Γιάννης Λιαπέρδος

Επίκουρος Καθηγητής
Τμήμα Ψηφιακών Συστημάτων
Σχολή Οικονομίας και Τεχνολογίας
Πανεπιστήμιο Πελοποννήσου

Ακαδημαϊκές Θέσεις

  • σήμερα 2019

    Επίκουρος Καθηγητής

    Πανεπιστήμιο Πελοποννήσου, Σχολή Οικονομίας και Τεχνολογίας,

    Τμήμα Ψηφιακών Συστημάτων

  • 2019 2016

    Επίκουρος Καθηγητής

    ΤΕΙ Πελοποννήσου, Σχολή Τεχνολογικών Εφαρμογών,

    Τμήμα Μηχανικών Πληροφορικής Τ.Ε.

  • 2016 2013

    Καθηγητής Εφαρμογών

    ΤΕΙ Πελοποννήσου, Σχολή Τεχνολογικών Εφαρμογών,

    Τμήμα Μηχανικών Πληροφορικής Τ.Ε.

  • 2013 2008

    Καθηγητής Εφαρμογών

    ΤΕΙ Καλαμάτας, Παράρτημα Σπάρτης,

    Τμήμα Τεχνολογίας Πληροφορικής και Τηλεπικοινωνιών

  • 2008

    Εργαστηριακός Συνεργάτης

    ΤΕΙ Καλαμάτας, Παράρτημα Σπάρτης,

    Τμήμα Τεχνολογίας Πληροφορικής και Τηλεπικοινωνιών

Εκπαίδευση

Διδασκαλία

Προπτυχιακά Μαθήματα

Τρέχοντα
  • Φυσική
  • Ηλεκτρονικά
  • Ηλεκτρικά Κυκλώματα
  • Σχεδίαση Ψηφιακών Συστημάτων
  • Σχεδίαση Αναλογικών Συστημάτων
Άλλα
  • Αναλογικά Ηλεκτρονικά
  • Ψηφιακή Λογική Σχεδίαση
  • Ψηφιακά Ηλεκτρονικά
  • Σχεδίαση Αναλογικών Ολοκληρωμένων Κυκλωμάτων
  • Έλεγχος Ορθής Λειτουργίας Ολοκληρωμένων Κυκλωμάτων

Έρευνα

Σύνοψη

Το μεγαλύτερο μέρος της ερευνητικής μου προσπάθειας εστιάζει στην ανάπτυξη τεχνικών ελέγχου ορθής λειτουργίας αναλογικών ολοκληρωμένων κυκλωμάτων και τεχνικών διόρθωσης των επιδόσεων των κυκλωμάτων αυτών μετά την κατασκευή τους.

Σκοπός της έρευνας είναι η αύξηση της κατασκευαστικής απόδοσης (yield) με άμεσο αντίκτυπο στη μείωση του κόστους ανά chip, όπως και η ελαχιστοποίηση των ελαττωματικών κυκλωμάτων τα οποία καταλήγουν στον τελικό καταναλωτή.

Ερευνητικά Ενδιαφέροντα

  • Σχεδίαση ολοκληρωμένων κυκλωμάτων
  • Έλεγχος ορθής λειτουργίας αναλογικών ολοκληρωμένων κυκλωμάτων
  • Τεχνικές διόρθωσης της επίδοσης αναλογικών ολοκληρωμένων κυκλωμάτων
  • Ολοκληρωμένα κυκλώματα ειδικού σκοπού (ASICs)
  • Ολοκληρωμένα κυκλώματα για τηλεπικοινωνιακές εφαρμογές
  • Εκπαιδευτικές τεχνολογίες

Δημοσιεύσεις

Φίλτρο:

Ταξινόμηση κατ' έτος:

State Reduction for Efficient Digital Calibration of Analog/RF Integrated Circuits

J. Liaperdos, A. Arapoyanni, Y. Tsiatouhas
Περιοδικό Analog Integrated Circuits and Signal Processing, vol. 90, no 1, pp. 65-79, Jan. 2017

Περίληψη

Calibration of analog/radio-frequency (RF) integrated circuits addresses the problem of yield loss that is a result of the increased variability commonly observed in nanoscale processes. In order to compensate for increased yield loss, calibration techniques have been developed that are applied to fabricated chips, aiming at the restoration of a circuit’s performance to its acceptable range of values that are defined by the specifications. To allow calibration, adjustable elements are introduced that provide multiple states of a circuit’s operation through built-in tuning knobs. Digital calibration—that refers to the case of discrete tuning knob settings—is performed by switching to a circuit’s state at which all performance characteristics are restored to their specified ranges. Due to the large number of performance characteristics of interest a large space of tuning knob settings should be explored, that leads to a series of practical considerations that need to be addressed, such as increased times required for calibration preparation and conduction, or chip area overhead if built-in tuning knobs are used. In this paper we present a method to maintain a desired level of yield recovery through the exploitation of only a minimum number of calibration states, also ensuring low cost by shortening calibration times and reducing chip area overhead. The proposed method is assessed through case studies conducted on a typical RF mixer designed in a 180 nm CMOS technology.

Adjustable RF Mixers’ Alternate Test Efficiency Optimization by the Reduction of Test Observables

J. Liaperdos, A. Arapoyanni, Y. Tsiatouhas
Περιοδικό IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 32, no 9, pp. 1383-1394, Sep. 2013

Περίληψη

A method for the optimization of the efficiency of alternate tests for adjustable RF mixers is presented in this paper. Alternate tests provide a cost- and time-effective substitute for their conventional specification-based counterparts by attempting to predict rather than directly measuring a circuit's performance from its response to suitable test stimuli. In order to provide post-manufacture yield recovery through calibration, integrated RF circuits-especially nanometric circuits-are often designed to present some form of adjustability. Such a property offers a set of discrete states of operation, from which a performance-compliant state is selected by calibration. In general, an alternate test can be conducted for each discrete state of operation, thus providing a large set of test observables from which regression models can be constructed to predict performance in all available states. However, test time and cost concerns impose that the derivation of the predictive models should be performed through an optimization procedure that aims to select a subset of the test observables that minimizes a certain cost criterion. In this paper, alternate tests for adjustable RF mixers are considered where the test response consists of dc voltage levels that appear at certain circuit nodes while the mixer operates in homodyne mode. Selection algorithms are applied to determine the optimum observables from the test response. Simulations on a typical RF mixer, designed in an 0.18- μm CMOS technology, have shown significant improvement in the corresponding alternate test efficiency.

On the Efficiency of the Shortened Error Correcting Codes

I. Liaperdos, I. Paraskevas, S. M. Potirakis
Περιοδικό International Journal of Electrical Engineering Education, vol. 50, no 2, pp. 201-212, Apr. 2013

Περίληψη

Shortening is a widely used technique aiming mainly to reduce the block size of an error correcting code and at the same time to enhance its efficiency. However, due to a common misapprehension, students tend to believe that maximum shortening retains maximum coding efficiency. In this work, an educational approach is presented which eliminates the aforementioned misapprehension. Specifically, the efficiency of the shortened error correcting codes is examined both theoretically and experimentally via simulations.

A Test and Calibration Strategy for Adjustable RF Circuits

J. Liaperdos, A. Arapoyanni, Y. Tsiatouhas
Περιοδικό Analog Integrated Circuits and Signal Processing, vol. 74, no 1, pp. 175 - 192, Jan. 2013

Περίληψη

A test and calibration strategy suitable for adjustable RF circuits is presented in this paper. Certain performance-affecting circuit elements are designed to be digitally controllable, providing the capability to adjust the performance characteristics of a circuit’s instance around their post-fabrication values, throughout a set of discrete states of operation. The alternate test methodology is adopted for test and calibration and a set of optimally selected test observables is used to develop regression models for the prediction of the circuit’s performance characteristics in every state of operation. In the test phase, measurements of the test observables are obtained from a subset of the circuit’s states. The processing of these observables provides accurate prediction of the RF circuit’s performance characteristics in all available states and enables the discrimination of defect-free from defective circuits. The latter is further accomplished by the exploitation of an extended superset of the test observables, the use of which intends to maximize fault coverage. Moreover, the predicted performance characteristics are also used to examine compliance with the specifications and to allow calibration of the RF circuit by identifying the appropriate state of operation at which all specifications are met and, consequently, by forcing the circuit to operate in this specific state. The efficiency of the proposed technique has been validated by its application to a typical differential RF Mixer designed in a 0.18 μm CMOS technology. Simulation results have been obtained and assessed.

A Built-In Voltage Measurement Technique for the Calibration of RF Mixers

J. Liaperdos, A. Arapoyanni, Y. Tsiatouhas
Περιοδικό IEEE Transactions on Instrumentation and Measurement, vol. 62, no 4, pp. 732-742, Apr. 2013

Περίληψη

A built-in technique to measure internal DC voltage levels used for the calibration of radio frequency (RF) mixers is presented in this paper. According to a common alternate test approach, RF mixer calibration is based on the prediction of the circuit's performance characteristics that requires the acquisition of a set of DC voltage observables obtained from specific nodes of the mixer operating in homodyne mode. These observables, however, often correspond to internal nodes where direct access is not always possible. Furthermore, accurate calibration might require a relatively large set of voltage observables whose direct access would lead to a waste of resources and to increased cost. The proposed built-in technique provides digital readings for the DC levels at all nodes of interest through a single interface by exploiting the use of a voltage acquisition circuit implemented by a simple analog to digital converter, which consists of a ring-type voltage controlled oscillator and a counter. A reading correction method to minimize the uncertainty introduced by process variations and device mismatches in the acquisition circuit itself is also described. The efficiency of the proposed technique has been validated by its application to the calibration procedure of a typical differential RF mixer designed in a 0.18-μm CMOS technology. Simulation results have been obtained and assessed, both for the proposed built-in voltage measurement technique and for the direct voltage measurement approach, in favor of comparison.

Development of Automatically Updated Soundmaps for the Preservation of Natural Environment

I. Paraskevas, S. M. Potirakis, I. Liaperdos, M. Rangoussi
Περιοδικό Journal of Environmental Protection 2 (2011), pp. 1388-1391

Περίληψη

Automatically Updated Soundmaps are maps that convey the sound rather than the visual information content of an area of interest, at a certain time instant or period. Sound features encapsulate information that can be combined with the visual features of the landscape, thus leading to useful environmental conclusions. This work aims to construct an Automatically Updated Soundmap of an area of environmental interest. A hierarchical pattern recognition approach method is proposed here that can exploit sound recordings collected by a network of microphones. Hence, after appro-priate signal processing, the large amounts of information, originally in the raw form of sound recordings, can be pre-sented in the concise yet meaningful form of a periodically updated soundmap.

Automatically Updated Soundmaps as a tool for environmental monitoring: Research in progress

I. Paraskevas, S. M. Potirakis, I. Liaperdos, M. Rangoussi
Περιοδικό Soundscape The Journal of Acoustic Ecology, vol. 11, no 1, pp. 57-58, 2011

Improved Alternate Test Accuracy Using Weighted Training Sets

J. Liaperdos, A. Arapoyanni, Y. Tsiatouhas
Συνέδριο Διεθνές 31st Conference on Design of Circuits and Integrated Systems (DCIS), 2016

Περίληψη

The alternate test paradigm has been proposed as a low-cost replacement to expensive and time consuming conventional specification tests of analog/radio-frequency (RF) integrated circuits. Feasibility of alternate tests may be compromised if the pertinent models that are used for the prediction of a circuit's performance are of poor accuracy. To construct accurate models across the whole design space, a large set of real data needs ideally to be collected from different wafers and lots over a long period of time, that is not possible in the early production stage. In this paper we show that, even when small training sets are available, alternate test accuracy can be significantly improved if the training set is statistically treated in a weighted fashion. The proposed technique is demonstrated for an alternate test procedure developed for a 180nm CMOS RF mixer.

Optimized Built-In Self-Calibration of RF SoCs

J. Liaperdos, A. Arapoyanni, Y. Tsiatouhas
Συνέδριο Διεθνές 5th International Conference on Modern Circuits and Systems Technologies (MOCAST), 2016

Περίληψη

Built-in self-calibration (BiSC) of RF SoCs allows the restoration of a circuit's conformance to its specifications in case of violations due to process variations and device mismatches that are common in nanoscale technologies. A method to optimize BiSC is presented in this paper, by which the number of successfully restored circuits is maximized using the minimum possible number of calibration states. The method is assessed through a case study conducted on a typical RF mixer designed in a 180 nm CMOS technology, and it is shown that yield is doubled by using only five calibration states.

Machine Learning in Alternate Testing of Integrated Circuits

J. Liaperdos, A. Arapoyanni, Y. Tsiatouhas
Κεφάλαιο σε βιβλίοTsihrintzis G., Virvou M., Sakkopoulos E., Jain L. (eds) Machine Learning Paradigms. Learning and Analytics in Intelligent Systems, vol 1. Springer, Cham, 2019
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Περίληψη

Integrated circuit (IC) fabrication involves sophisticated and sensitive equipment, while design complexity and scale of integration are increasing in order to obtain the largest functionality within the smallest possible chip area. As ICs scale down, increasing uncertainties in the manufacturing processes lead to increased numbers of malfunctioning chips that have to be detected and withdrawn early in the production stage in order to assure product quality. Testing an IC for compliance with its specifications might require a considerable amount of time and resources, since a wide range of different tests—each tailored for a specific performance characteristic—should be performed, resulting in the collection of extremely large data sets that correspond to test data. In order to reduce test time and cost, several machine learning techniques have been applied for the identification of patterns and non-linear correlations among test data and performance characteristics. Furthermore, data analytics have achieved promising results in areas such as test quality prediction and fault diagnosis. In this chapter, the Alternate Test paradigm is presented since it is probably the most well-established machine learning application in the field of IC testing. Alternate Test is performed by the exploitation of a set of common test observables—produced using simple stimuli and cost-effective equipment of low complexity—that are sufficiently correlated to all performance characteristics of interest. Following the supervised learning approach, non-linear regression models are constructed for each performance characteristic, that provide accurate performance predictions based on the values of the measured test observables. Using statistical feature selection techniques, a low dimensionality can be obtained for the set of test observables, by which a further reduction in test time and cost can be achieved.

Μαθήματα Ψηφιακών Ηλεκτρονικών

Λιαπέρδος, Ιωάννης
Βιβλίο Ελληνικά Ακαδημαϊκά Ηλεκτρονικά Συγγράμματα και Βοηθήματα / Κάλλιπος | ISBN: 978-960-603-510-4
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Το βιβλίο περιλαμβάνει σειρά μαθημάτων στα Ψηφιακά Ηλεκτρονικά, με τα οποία επιχειρείται η εισαγωγική παρουσίαση των θεμελιωδών αρχών της ψηφιακής λογικής (αριθμητικά συστήματα, άλγεβρα Boole, κ.λπ.) και των εφαρμογών τους στη σχεδίαση συνδυαστικών και ακολουθιακών ψηφιακών κυκλωμάτων. Παρουσιάζονται, επίσης, μέθοδοι ανάλυσης και σύνθεσης απλών μηχανών καταστάσεων.

Sound-maps of environmentally sensitive areas constructed from Wireless Acoustic Sensors Network data

E.T. Michailidis, J. Liaperdos, N.A. Tatlas, S.M. Potirakis, M. Rangoussi
Συνέδριο Διεθνές 5th International Conference on Materials and Applications for Sensors and Transducers (IC-MAST), 2015

Fast Deployment of Alternate Analog Test Using Bayesian Model Fusion

J. Liaperdos, H.-G. Stratigopoulos, L. Abdallah, Y. Tsiatouhas, A. Arapoyanni, X. Li
Συνέδριο Διεθνές 18th IEEE/ACM Conference on Design, Automation and Test in Europe (DATE), 2015

Περίληψη

In this paper, we address the problem of limited training sets for learning the regression functions in alternate analog test. Typically, a large volume of real data needs to be collected from different wafers and lots over a long period of time to be able to train the regression functions with accuracy across the whole design space and apply alternate test with high confidence. To avoid this delay and achieve a fast deployment of alternate test, we propose to use the Bayesian model fusion technique that leverages prior knowledge from simulation data and fuses this information with data from few real circuits to draw accurate regression functions across the whole design space. The technique is demonstrated for an alternate test designed for RF low noise amplifiers.

A Method for the Estimation of Defect Detection Probability of Analog/RF Defect-Oriented Tests

J. Liaperdos, A. Arapoyanni, Y. Tsiatouhas
Συνέδριο Διεθνές 18th IEEE/ACM Conference on Design, Automation and Test in Europe (DATE), 2015

Περίληψη

A method to realistically estimate the defect detection probability achieved by defect-oriented analog/RF integrated circuit tests at the circuit design level is presented in this paper. The proposed method also provides insight to the efficiency of the various available defect-oriented testing techniques, thus allowing the selection of the most suitable for a specific circuit. The effect of structural defects in the presence of process variations and device mismatches is taken into account, by the exploitation of the defect probability distributions and the statistical models of the used technology. Although the proposed methodology is generally applicable to the entire class of analog circuits, its application to simple RF circuits which consist of a few elements seems to be more practical, due to the affordable computational cost implied by circuits with shorter defect dictionaries. In order to obtain results without a reliability compromise, the number of required statistical simulation runs is reduced through regression. The application of the proposed method on a typical RF mixer, designed in a 0.18μm CMOS technology, is also presented.

A Method to Reduce Misclassification Errors in Alternate Analog/RF Integrated Circuit Tests

J. Liaperdos, A. Arapoyanni, Y. Tsiatouhas
Συνέδριο Εθνικό 3rd Pan-Hellenic Conference on Electronics and Telecommunications (PACET), 2015

Εισαγωγή στην Ηλεκτρονική

Λιαπέρδος, Ιωάννης
Βιβλίο Ελληνικά Ακαδημαϊκά Ηλεκτρονικά Συγγράμματα και Βοηθήματα / Κάλλιπος | ISBN: 978-618-82124-8-0
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Το βιβλίο απευθύνεται σε προπτυχιακούς σπουδαστές των Τεχνολογικών Εκπαιδευτικών Ιδρυμάτων, στα Τμήματα των οποίων η Ηλεκτρονική διδάσκεται ως μάθημα "κορμού". Δεδομένου του διαφορετικού γνωστικού υποβάθρου των σπουδαστών, το σύγγραμμα επιχειρεί στο πρώτο κεφάλαιο να εφοδιάσει τον αναγνώστη του με όλες τις εισαγωγικές γνώσεις οι οποίες είναι απαραίτητες για την κατανόηση του περιεχομένου των κεφαλαίων που ακολουθούν. Παρουσιάζονται κατά τρόπο προοδευτικό οι βασικές αρχές που διέπουν τη λειτουργία των θεμελιωδών ηλεκτρονικών διατάξεων και παρατίθενται οι κυριότερες εφαρμογές τους. Ειδικότερα, παρατίθενται και αναλύονται εφαρμογές των διόδων (στην ανόρθωση, εξομάλυνση και σταθεροποίηση εναλλασσόμενων τάσεων), κυκλώματα ενισχυτών με διπολικά τρανζίστορ και MOSFET, εφαρμογές των τελεστικών ενισχυτών, και απλές τοπολογίες φίλτρων και αρμονικών ταλαντωτών. Παρόλο που το σύγγραμμα επικεντρώνεται κυρίως στη μελέτη αναλογικών ηλεκτρονικών κυκλωμάτων, επιχειρείται επιπλέον η εισαγωγή του αναγνώστη στη μεθοδολογία σχεδίασης ψηφιακών λογικών κυκλωμάτων, η οποία παρατίθεται σε εξειδικευμένο κεφάλαιο.

A Method to Adjust the Accuracy of Analog/RF Alternate Tests

J. Liaperdos, A. Arapoyanni, Y. Tsiatouhas
Συνέδριο Διεθνές 28th Conference on Design of Circuits and Integrated Systems (DCIS), 2013

Testing Wireless Transceivers' RF Front-Ends Utilizing Defect-Oriented BIST Techniques

L. Dermentzoglou, J. Liaperdos, A. Arapoyanni, Y. Tsiatouhas
Συνέδριο Διεθνές 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 2012

Περίληψη

In modern nanotechnologies, the testing of embedded wireless transceivers' RF front-ends is a great concern. The test technique presented in this work is based on dedicated built-in self test (BIST) structures for each building block of the transceiver. These BIST circuits utilize defect-oriented test techniques. Experimental results on a CMOS transceiver design are discussed to accentuate the efficiency of the proposed scheme.

An Alternate Test Strategy for Differential RF Mixers

I. Liaperdos, L. Dermentzoglou, A. Arapoyanni, Y. Tsiatouhas
Συνέδριο Εθνικό 2nd Pan-Hellenic Conference on Electronics and Telecommunications (PACET), 2012, p.1.3

A flexible hardware basis for sensor network nodes with wireless communication capabilities

S. Despotopoulos, E. Kyriakis-Bitzaros, I. Liaperdos, D. Nicolaidis, I. Paraskevas, S. Potirakis, M. Rangoussi, N.-A. Tatlas
Συνέδριο Εθνικό International Scientific Conference eRA-7, Special Session on Smart electronic systems in sensing & control applications, 27 - 30 September 2012, Piraeus, Greece.

Pattern recognition for the development of Sound Maps for environmentally sensitive areas

S. Despotopoulos, E. Kyriakis-Bitzaros, I. Liaperdos, D. Nicolaidis, I. Paraskevas, S. Potirakis, M. Rangoussi, N.-A. Tatlas
Συνέδριο Εθνικό International Scientific Conference eRA-7, Special Session on Smart electronic systems in sensing & control applications, 27 - 30 September 2012, Piraeus, Greece.

Fault Detection in RF Mixers Combining Defect-Oriented and Alternate Test Strategies

I. Liaperdos, L. Dermentzoglou, A. Arapoyanni, Y. Tsiatouhas
Συνέδριο Διεθνές 26th Conference on Design of Circuits and Integrated Systems (DCIS), 2011

A Test Technique and a BIST Circuit to Detect Catastrophic Faults in RF Mixers

L. Dermentzoglou, J. Liaperdos, A. Arapoyanni, Y. Tsiatouhas
Συνέδριο Διεθνές 6th International Conference on Design & Technology of Integrated Systems in nanoscale era (DTIS), 2011

Περίληψη

A test technique and a Built-In Self-Test (BIST) circuit to detect catastrophic faults in RF Mixers is presented in this paper. During test application the Mixer is set to operate in homodyne mode and the DC levels generated at its outputs are used as test observables. These test observables are converted to digital signatures, by a simple embedded circuit, and are used to discriminate fault free from faulty Mixers. The proposed technique has been applied to a typical differential RF Mixer designed in a 0.18μm CMOS technology. Simulation results validated its efficiency to provide a high coverage of catastrophic faults which exceeds 90%.

A distributed microelectronic system for environmental monitoring with emphasis on sound mapping

M. Rangoussi, S.M.Potirakis, N.-A.Tatlas, E.Kyriakis-Bitzaros, I.Paraskevas, I.Liaperdos
Συνέδριο Εθνικό International Scientific Conference eRA-6, Archimedes III Session, 19 - 24 September 2011, Piraeus, Greece.

Building a Low-Cost Network for Power Quality Monitoring with Open-Source Hardware Nodes

I. Liaperdos, I. Paraskevas, S. Potirakis, M. Rangoussi
Συνέδριο Διεθνές 7th Mediterranean Conference and Exhibition on Power Generation, Transmission, Distribution and Energy Conversion (MedPower), 2010

Περίληψη

This paper presents the guidelines for building a low-cost network suitable for power-quality monitoring. The implementation of a standalone basic node capable of extracting various power-quality metrics (Total Harmonic Distortion-THD, Crest Factor, etc) in an open-source hardware embedded system board is described. By utilizing simple signal processing techniques directly in hardware, this node maintains high portability due to its small dimensions. Furthermore, exploitation of its built-in TCP/IP capabilities allows the deployment of a wide area network by the interconnection of basic nodes, in order to provide power-quality data collection for further processing and evaluation. Due to the distributed processing load, the proposed network can achieve high efficiency and reliability.

Detection of Transient Events using the Hartley Phase Cepstrum for Improved Power Quality

I. Paraskevas, A. Kokkosis, I. Liaperdos, M. Rangoussi
Συνέδριο Διεθνές 7th Mediterranean Conference and Exhibition on Power Generation, Transmission, Distribution and Energy Conversion (MedPower), 2010

Περίληψη

In Electric Power Quality (PQ), transient disturbances of short duration in the voltage or current waveforms supplied by the Utility have a severe impact on the operation and safety of both the user equipment and the total energy network. Advanced signal processing methods are currently being developed and employed for the detection of transient PQ events. The Phase Cepstrum of the waveform data is proposed here as a tool for the detection and localization of such PQ transients. Specifically, the Hartley Phase Cepstrum is employed thanks to certain advantages it bears as to its conventional Fourier counterpart. These stem from the properties of the corresponding Hartley Phase Spectrum, which carry over to the cepstral domain because of the analytic relation that holds between the two domains. Unlike the Fourier Phase Cepstrum, the Hartley Phase Cepstrum does not suffer from ambiguities introduced by the phase 'unwrapping' processing step; therefore, the evaluation of the Hartley Phase Cepstrum is an invertible process. For the same reason, the Hartley Phase Cepstrum offers improved detection and localization of a sequence of transient events.

A High Speed Low Power CMOS Clock Driver Using Charge Recycling Technique

I. Bouras, Y. Liaperdos, A. Arapoyanni
Συνέδριο Διεθνές Proc. IEEE Int. Symposium on Circuits and Systems (ISCAS), 2000, pp. 657-660.

Περίληψη

This paper presents an Improved Power-Delay Product (PDP) CMOS clock driver based on the charge recycling technique. Two NMOS pass transistors driven by appropriate control signals are used to accomplish the charge recycling procedure. Simulations have shown an up to 18% improvement of PDP over an equivalent conventional CMOS driver.

Έργα

  • image

    Ερευνώ – Δημιουργώ – Καινοτομώ "Επικοινωνίες ορατού φωτός με εφαρμογή στις βιομηχανίες των επικοινωνιών, του εμπορίου, των μεταφορών, της επιμελητείας, του πολιτισμού και του τουρισμού (VIOLIN)"

    σε εξέλιξη

    Αντικείμενο του έργου αποτελεί η αξιοποίηση της τεχνολογίας VLC (Visible Light Communications) για ενδοκτηριακές επικοινωνίες υψηλής ταχύτητας με εφαρμογή σε χώρους υψηλών απαιτήσεων για συνδεσιμότητα (αεροδρόμια, τεχνολογικά πάρκα, αίθουσες πολλαπλών χρήσεων), σε χώρους προώθησης και διαφήμισης προιόντων (π.χ. εκθέσεις), σε χώρους διαχείρισης εφοδιαστικής αλυσίδας και διανομής προϊόντων (logistics) καθώς σε χώρους υψηλού πολιτιστικού και δημιουργικού ενδιαφέροντος (π.χ. μουσεία).

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    ΑΡΧΙΜΗΔΗΣ ΙΙΙ "Κατανεμημένο Μικροηλεκτρονικό Σύστημα Περιβαλλοντικής Επίβλεψης με Έμφαση στην Ηχητική Χαρτογράφηση"

    Τμήμα Ηλεκτρονικής ΤΕΙ Πειραιά, Επιστ. Υπευθ. Καθ. Μ. Ραγκούση, (2013-2015)

    Αντικείμενο του υποέργου είναι ο σχεδιασμός και η ανάπτυξη κατανεμημένου μικροηλεκτρονικού συστήματος για ηχητική επίβλεψη περιοχών περιβαλλοντικού ενδιαφέροντος. Στηρίζεται σε ασύρματο δίκτυο ακουστικών αισθητήρων (μικροφώνων) το οποίο υποστηρίζει την καταγραφή ηχητικών / ακουστικών σημάτων πεδίου, την κυρίως επεξεργασία τους από ένα ιεραρχικό σχήμα αναγνώρισης προτύπων και τη χρήση των αποτελεσμάτων για την τροφοδοσία εφαρμογής λογισμικού που αναπτύσσεται για την αυτοματοποιημένη σύνθεση ηχοχαρτών. Οι προτεινόμενοι ηχοχάρτες επεκτείνουν τη γνωστή έννοια των χαρτών θορύβου για να καλυφθεί περιβαλλοντικό ηχητικό περιεχόμενο ευρύτερο του θορύβου. Ανανεώνονται περιοδικά βάσει μετρήσεων πεδίου που διατίθενται μέσω δικτύου. Παρέχουν περιβαλλοντική πληροφορία που είναι ακριβής, πλήρης και επίκαιρη. Για το λόγο αυτό αποτελούν πολύτιμα εργαλεία για την επίβλεψη περιβαλλοντικά ευαίσθητων περιοχών, τόσο ως προς τις επιπτώσεις των ανθρωπογενών δραστηριοτήτων όσο και ως προς την εξέλιξη φυσικών παραγόντων (πανίδα – κλίμα), ώστε να υποστηριχθεί η άμεση λήψη αποφάσεων και μέτρων προστασίας.

  • Υλοποίηση του ηλεκτρονικού περιοδικού ΚΑΛΑΜΑdaΤΑ (περιοδικό βιβλιοθήκης), Μάρτιος 2013

    Βιβλιοθήκη ΤΕΙ Καλαμάτας

    Το έργο υλοποιήθηκε στα πλαίσια του ΠΕ6.2 της Πράξης «Αναβάθμιση υπηρεσιών Βιβλιοθήκης ΤΕΙ Καλαμάτας με υλοποίηση Κεντρικού Αποθετηρίου, εμπλουτισμός του με ψηφιοποιημένο και τεκμηριωμένο υλικό, ενσωμάτωση νέων υπηρεσιών επικοινωνίας και ενημέρωσης χρηστών (wikis/blogs) και ταυτοποίηση υλικού με χρήση τεχνολογίας RFID» του υποέργου «Υπηρεσίες προστιθέμενης αξίας προς την ακαδημαϊκή κοινότητα»

  • ΕΠΕΤ-ΙΙ 476 "Ανάπτυξη Βιομηχανικών Προϊόντων Μικροηλεκτρονικής" (Ιαν. 1995 - Δεκ. 1996)

    Τμήμα Πληροφορικής, Εθνικό και Καποδιστριακό Πανεπιστήμιο Αθηνών

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